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Kaustav BanerjeeProfessor Electrical & Computer Engineering  ContactsDepartment of Electrical and Computer Engineering tel: (805) 893-3337 |
Thermal Management of Nanoscale CMOS ICs Cover Page of IEEE-TED January 2008: Self-consistent simulation of the temperature profile of a modern silicon integrated circuit from ‘‘Cool Chips: Opportunities and Implications for Power and Thermal Management’’ by S-C Lin and K. Banerjee, TED, Vol. 55, No. 1, 2008. Research DescriptionResearch in the Nanoelectronics Lab at UCSB focuses on two central themes: (i) Emerging nanoscale issues in scaled CMOS technologies and their implications for high-performance and low-power circuits (ii) Circuit and system applications of non-classical CMOS and beyond-CMOS nanoelectronics >>Specific areas of emphasis within the first theme include: (a) Robust circuit design and design automation techniques under increasing variability and leakage (b) Ultra high-frequency interconnect modeling and extraction techniques (c) Integrated electro-thermal engineering of devices, interconnects, circuits and systems (d) Innovative low-power circuit design >>Research areas under the second theme include: (a) Innovative device-circuit-architecture (including 3-D ICs) co-design and optimization for overcoming end-of-roadmap CMOS limitations such as leakage and electrostatic effects (b) Investigating and benchmarking of emerging nanoelectronic devices (such as silicon-nanowire and carbon-nanotube based FETs) and interconnects for VLSI applications (c) Novel circuit and system applications (including fast switch and memory) of beyond-CMOS nanotechnologies Research Groups |
BiographyKaustav Banerjee received the Ph.D. degree in Electrical Engineering and Computer Sciences from the University of California-Berkeley in 1999 working with Prof. Chenming Hu. In July 2002, he joined the Faculty of the Department of Electrical and Computer Engineering at UCSB as an assistant professor, received tenure in 2004 and attained full professorship in 2007. He was with Stanford University during 1999-02 as a Research Associate at the Center for Integrated Systems. From February to August 2002 he was a Visiting Faculty at the Circuit Research Labs of Intel, Hillsboro, OR. In the past, he has also held summer/visiting positions at Texas Instruments Inc., Dallas, TX (1993-1997), and the Swiss Federal Institute of Technology (EPFL), Lausanne, Switzerland (2001). Dr. Banerjee’s doctoral research at Berkeley and subsequent work at Stanford on thermal issues in integrated circuits set the foundation for Gradient Design Automation, the first company to introduce temperature-aware IC design technology in the Electronic Design Automation Industry. He has also been recognized with numerous awards and honors. His present research interests focus on nanometer scale issues in high-performance VLSI as well as on circuits and systems issues in emerging nanoelectronics. At UCSB, Dr. Banerjee directs the Nanoelectronics Research Lab and is an affiliated faculty at the California NanoSystems Institute. His research has been chronicled in over 150 journal and refereed conference papers. He has also co-edited a book titled Emerging Nanoelectronics: Life with and after CMOS (Springer—Verlag, 2004) and coauthored two book chapters on 3-D integrated circuits. Dr. Banerjee has served on the technical program committees of several leading IEEE and ACM conferences including IEDM, DAC, ICCAD and IRPS. He has also served on the organizing committee of ISQED at various positions including Technical Program Chair (2002) and General Chair (2005). At present, he serves on the IEEE EDS Nanotechnology Committee. He is a Senior Member of IEEE and is listed in Who’s Who in America (since 2003) and Who’s Who in Science and Engineering (since 2005). Awards/Honors
Selected PublicationsSee complete list of publications
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